DRC Coprocessor Systems

DRC introduces the industry’s first Reconfigurable Processor Unit that delivers the optimal way to directly connect a programmable processor unit to a processor bus and system memory.

The DRC RPU is a system solution for solving compute-intensive problems and for accelerating high-performance applications. The RPU consists of DRC logic along with programmable hardware that plugs directly into an open processor socket in a multi-way Opteron system.

The DRC RPU provides the most tightly-coupled coprocessing environment possible with direct access to DDR memory and any adjacent Opteron processor at full HyperTransport bandwidth and low latency. The RPU then becomes a resource for the remaining Opteron processor, offloading CPU-intensive software subroutines to hardware.

Second Generation CNP 2.0 beats Super PC Cluster

The CNP 2.0 is a flexible platform utilizing FPGA technology for extreme performance computing, such as real time signal processing, image processing and system simulations, or as an accelerator in HPC applications. The CNP’s unique solutions for internal communication and resource scheduling provide unsurpassed scalability and extreme computational power. The overall architecture is well suited for seamless integration into larger system environments.

The system is built with a modular approach, each module carrying 4 Xilinx Virtex-4 FPGAs. Each chassi, utilizing the 19" form-factor, houses up to 16 modules. The modules have extreme inter- and intra-board communication bandwidths with an aggregated bandwithd of 32 Gbyte/s per section of eight boards. Each board carries 5 Gbyte of DRAM with a 14 Gbyte/s aggregated bandwidth per board, and 40 Mbyte of fast cache SRAM with a 13 Gbyte/s aggregated bandwitdth per board.

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